Memory devices for storing digital data are abundant in today's computers, automobiles, cell telephones and media information cards. Certain of these memory devices or storage elements, referred to as non-volatile memory, retain the stored digital data after device power has been removed. For example non-volatile memory instructions instruct a computer during the boot-up process and store instructions and data for sending and receiving calls in a cellular telephone. Electronic products of all types, from microwave ovens to heavy industrial machinery, store their operating instructions in non-volatile storage elements. Certain non-volatile memory devices offer multiple programming capabilities with previously stored information overwritten by new data. Other non-volatile devices provide only one-time programmability.
Volatile memory devices loose the stored information when power is removed. Dynamic random access memories (DRAM) and static random access memories (SRAM) are two types of volatile memory devices.
A read-only memory (ROM) is a non-volatile memory that provides permanent data storage. Once stored in the ROM device, the data cannot be overwritten or otherwise altered. The ROM is “programmed” during manufacture according to the design of each memory cell such that each cell stores a zero bit or a one bit. Since the ROM is programmed during the design stage, the stored information is modifiable only by redesigning the ROM.
A programmable read-only memory (PROM) is a non-volatile memory device that permits one-time programmability after fabrication. Each PROM memory cell comprises a fusible link further comprising metal or polysilicon material. A plurality of such memory cells and corresponding fuses are formed on a semiconductor die. After fabrication, selected ones of the plurality of fuses are opened with a laser beam, forming a binary pattern of opened and closed fuses that represent stored information. Passing a current through the assembly of fuses reads the stored bits according to the opened and the closed fuses. A sense amplifier receives the output current to detect the logic state of each fuse (a zero bit for an unblown or closed fuse and a one bit for a blown or open fuse or vice versa).
Disadvantageously, fabrication of laser-opened fuses requires the creation of a process mask and execution of additional process steps to form and program the fuses in the die. These fuses consume chip area that could otherwise be devoted to active devices. Also, laser blown fuses require a special laser probe system to identify the location of fuses to be blown.
The fuses can also be electrically opened by passing a sufficiently large current through the fuse to melt the fuse material and create an open circuit. See the commonly owned patent application entitled, Apparatus and Method for Programming a One-time Programmable Memory Device, filed on Sep. 20, 2003, and assigned application Ser. No. 10/675,571. For electrically-opened fuses, a relatively large (i.e., large current carrying capacity) transistor is required to provide sufficient current to open the fuse. These transistors consume a substantial area of the integrated circuit device and thus impose an area penalty, which can be a significant disadvantage for small chips.
An erasable programmable read-only memory (EPROM) is a non-volatile memory device that can be programmed, erased and reprogrammed as desired. The EPROM is programmed electronically and erased by ultraviolet light passing through an ultraviolet-permeable quartz window formed in a package of the memory device.
An EEPROM (electronically erasable programmable read-only memory) and flash EEPROM are read-only memory devices that can be programmed, electronically erased and electronically reprogrammed. A flash memory comprises a metal oxide semiconductor field effect transistor (MOSFET) having a conventional control gate and a floating gate separated from the control gate by a first insulating layer, where the control gate is separated from a channel region by a second insulating layer. Thus the floating gate is electrically isolated from the control gate and the channel region. The flash memory operates by removing (erasing) electrons from the floating gate or raising (programming) electrons to the floating gate. A charge on the floating gate affects the threshold voltage of the MOSFET and thus the control gate voltage required for MOSFET conduction.
When electrons are present on the floating gate, the control gate cannot form a conductive region in the channel in response to a typical gate turn-on voltage. Thus no current flows through the transistor, indicating, for example, a stored logic zero. When the transistor is conducting (with electrons removed from the floating gate and a typical gate turn-on voltage applied to the gate) the stored value represents a logic 1. A voltage applied between the control gate and a MOSFET source/drain terminal forces electrons to or remove electrons from the floating gate. The phenomenon by which electrons are disposed on the floating gate is known as Fowler-Nordheim tunneling.
To form a flash memory array, a plurality of MOSFET control gates are connected to a memory word line. A bit line connects to a first source/drain terminal of each of the same plurality of MOSFETS; a second source/drain terminal is connected to ground. A desired memory address is applied to the word line and the voltage appearing on the bit line represents the read data.
According to another embodiment of a floating gate or flash memory MOSFET element, in lieu of causing electrons to tunnel into the first insulating region separating the control gate from the floating gate, hot carriers can be injected into the first insulating layer for affecting the MOSFET threshold voltage.
Standard integrated circuit fabrication processes do not conventionally include a process step for forming the second or floating gate insulating layer with an optimal thickness. Also, the standard process flow may not be amenable to fabrication of high voltage transistors required for inducing electron tunneling or hot carrier injection. The standard fabrication processes must therefore be modified to fabricate flash memory devices.
As described above, certain non-volatile memory devices are limited to a single programming operation and are thus referred to as “one-time programmable (OTP),” memories. Although the flash memory can be read and written hundreds of times, it can also function as an OTP memory. OTP memory devices are subdivided into those with a relatively large number of storage elements (cells), such as an EEPROM flash memory, and those with a relatively small number of cells. OTP devices with a few cells are useful for trimming analog circuit values within the integrated circuit, for providing security features for the device with which they operate and for identifying the chip in which they are disposed.
In trimming applications, the programmed memory cells are operative to insert or delete resistors and capacitors into a circuit block within the integrated circuit. Stored bits control MOSFET switches for connecting or disconnecting resistors and capacitors in either series or parallel configurations. The analog trimming operation compensates for expected fabrication variations in high precision integrated circuits.
The OTP device can also store a relatively small number of non-modifiable data bits for identifying an integrated circuit chip. For example, during wafer probing a chip's location can be recorded or stored on the chip to uniquely identify the chip and its location on the wafer, i.e., the stored data serves as a die site identifier. After chip packaging, the identification information can be read with an off-chip reader, permitting the manufacturer to track chip failures and wafer yield. It may also be desired to track individual wafer dice by associating each die with a source wafer, a manufacturing lot and a wafer history.
For security applications, the stored OTP data provides a tamper-proof memory device to uniquely identify a hardware device in which the OTP memory is incorporated, such as a cell phone or satellite radio receiver. This identification technique is tamper-resistant since the user cannot reprogram the OTP memory.